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December 6-8, 2021 | San Fransisco, CA + Virtual
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Monday, December 6 • 4:30pm - 4:55pm
Advanced Interrupt Architecture and Advanced CLINT - Anup Patel, Western Digital & John Hauser, Independent Researcher

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The existing RISC-V platforms only support wired interrupts, machine-level timer interrupts and machine-level software interrupts in hardware hence there is no hardware support for message signaled interrupts (MSIs), MSI virtualization, and supervisor-level software interrupts. The advanced interrupt architecture (AIA) specification defines new interrupt controllers to support wired interrupts, MSIs and MSI virtualization in manner scalable for large number of HARTs. The advanced core local interruptor (ACLINT) specification defines separate devices for machine-level timer interrupts, machine-level software interrupts, and supervisor-level software interrupts in a manner backward-compatible for existing RISC-V platforms. The AIA and ACLINT specifications collectively address interrupt and timer requirements of different classes of RISC-V platforms.

avatar for Anup Patel

Anup Patel

Technologist, Western Digital Corporation
Anup Patel is an open-source enthusiast with primary interest in hypervisors, firmware, and Linux kernel. He has 15+ years of experience developing system level software across architectures. He is part of the Western Digital system software research group which does lot of open-source... Read More →

John Hauser

human, self
John Hauser is an independent computer architect, programmer, and researcher, with interests in hardware, computer languages, compilers, support libraries, low-level system software, and computer arithmetic. He received his Ph.D. in computer architecture from the University of California... Read More →

Monday December 6, 2021 4:30pm - 4:55pm PST
Room 3005/3007
  Beyond the RISC-V ISA
  • Talk Type Virtual
  • Presentation Slides Attached Yes