RISC-V Summit

NOEL-V is a is a RISC-V processor model that can be implemented in various configurations ranging from RV32I to RCV64GC. The NOEL-V processor has been developed by the CAES Gaisler Products group that has a long heritage of supplying processor implementations, both as IP cores and as ready-made radiation-tolerant standard products, for space applications. Jan Andersson will provide an overview of the fault-tolerance features implemented in the NOEL-V processor core and a description of the first radiation-hardened testchip. The presentation will describe how hardening measures against radiation effects is tied to different target technologies (for example ASIC vs. FPGA) and will also provide an overview of the GR7xV development, which is a 16-core RISC-V based processor targeted towards space applications.