RISC-V Summit has ended
December 6-8, 2021 | San Fransisco, CA + Virtual
Learn More & Register Now

Back To Schedule
Tuesday, December 7 • 11:00am - 11:10am
Lightning Talk: RISQV-HT: A RISC-V Microcontroller Delivering Post-Quantum Secure Encryption - and Hardware Trojans - Alexander Hepp, Technical University of Munich

Sign up or log in to save this to your schedule, view media, leave feedback and see who's attending!

Feedback form is now closed.
Empowering electronic devices to support Post-Quantum Cryptography (PQC) is a challenging task. Especially for low cost and resource constraint devices, hardware acceleration is usually required. The speaker presents RISQV-HT, an enhanced RISC-V device that integrates a set of powerful tightly coupled accelerators to speed up lattice and isogeny-based PQC. The RISC-V ISA is extended with 41 new instructions and performs roughly 10 times faster than a software solution when encrypting with Kyber and 21 times faster when encrypting with SIKE.

As a twist, four hardware Trojans were inserted into the final chip, threatening the security properties of integrity, confidentiality and availability. The speaker shows how to detect such Trojans with tape-out-tools and reverse engineering.

The RISQV-HT was implemented in ASIC technology and taped-out at the end of 2020.

avatar for Alexander Hepp

Alexander Hepp

Research Assistant, Technical University of Munich
Alexander Hepp received M.S in electrical and computer engineering from Technical University of Munich in 2019. Currently he is a research assistant and doctoral candidate at the Chair of Security in Information Technology at the Technical University of Munich. His current research... Read More →

Tuesday December 7, 2021 11:00am - 11:10am PST
Room 3005/3007
  Beyond the RISC-V ISA