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December 6-8, 2021 | San Fransisco, CA + Virtual
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Monday, December 6 • 9:30am - 9:55am
Implementing Functionally-safe RISC-V IP for Automotive and Safety Critical Applications - Shubu Mukherjee, SiFive

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Modern SoC’s for ADAS and other mission critical applications employ heterogeneous architectures consisting of application processors, vision and communication DSPs, and AI accelerators; each with different ISAs, toolchains, and levels of functional safety and security.  Semiconductor suppliers to these markets will greatly benefit from the simplicity of a single ISA capable of addressing the performance requirements of these varied processor blocks, whose openness facilitates achieving high levels of both functional safety and secure computing. In this presentation, SiFive will highlight the progress it has made towards delivering safety-capable RISC-V processors with all necessary features for future automotive applications.

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Shubu Mukherjee

Vice President, Architecture, SiFive
Shubu Mukherjee is a pioneer in the field of design and modeling of computer architecture. He was the 2009 recipient of the Maurice-Wilkes award, an ACM award for outstanding contributions to the field of computer architecture. He is also a Fellow of ACM and a Fellow of IEEE. Dr... Read More →

Monday December 6, 2021 9:30am - 9:55am PST
Room 3005/3007
  Beyond the RISC-V ISA