RISC-V is being used in complex real-time heterogeneous systems. The software executing on such systems needs to be tuned to provide the best performance possible. Developers need insight into the operation of the software and its interaction with the underlying hardware structures, including NoCs and CPUs. A key element of this is processor trace, which allows development teams to analyze program execution, how many cycles code takes to execute, whether there are stalls and dependencies and how long they last. System designers can use these insights to make optimizations and achieve efficiency gains.
The Efficient Trace for RISC-V (E-Trace) specification supports these needs. This presentation will outline the latest developments in E-Trace, and provide details of the features of the Embedded Analytics RISC-V Trace encoder, which implements features such as cycle-accurate and data trace, filtering, matching and SoC-wide cross-triggering, that can be used to produce significant improvements in overall system performance.
