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RISC-V Summit has ended
December 6-8, 2021 | San Fransisco, CA + Virtual
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YB

Yungang Bao

Institute of Computing Technology, Chinese Academy of Sciences (ICT, CAS)
Professor
Yungang Bao is a professor of Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) and the deputy director of ICT-CAS. Prof. Bao founded China RSIC-V Alliance (CRVA) and serves as the secretary-general of CRVA. His research interests include computer architecture and computer systems. He is leading the XiangShan project (https://github.com/OpenXiangShan/XiangShan), which aims to build an open-source high performance RISC-V core. He launched the One Student One Chip (OSOC) Initiative in 2019, which trains undergraduates to build real chips and has already attracted about 700 participants from 130 universities. Five undergraduates of the 1st-year OSOC Initiative succeeded in building a 64-bit RISC-V chip named NutShell (https://github.com/OSCPU/NutShell), which was manufactured by SIMC 110nm technology and can run Linux at 200MHz. His prior research works such as Labeled von Neumann Architecture (LvNA), Hybrid Memory Trace Tool (HMTT), Partition-Based DMA Cache and PARSEC 3.0 have been adopted by the industry including Alibaba, Huawei, Intel, Microsoft and also published on top conferences and journals such as ASPLOS, Communication of the ACM, HPCA, ISCA, NSDI and SIGCOMM etc. He was invited to present plenary keynote speeches at China National Computer Congress (CNCC) in 2016 and at ARM Research Summit 2018. He was the winner of CCF-Intel Young Faculty Award of the year for 2013 and the winner of CCF-IEEE CS Young Computer Scientist Award and China’s National Lofty Honor for Youth under 40 of the year for 2019.
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