Hugh Breslin is an Design Engineer at Microchip where he has had a focus on the test and verification of soft RISC-V SoCs, along with application development, system development and training for hardened SoC FPGAs and emulation platforms. Hugh also has a strong focus on software where he has developed a RISC-V ISA compliance test framework using Microchip’s SoftConsole IDE and the RISC-V ISA Compliance test suite.